Indira Gandhi Delhi Technical University for Women (IGDTUW) M.Tech. in Electronics and Communication Engineering (VLSI Design) Admission: Fees, Cutoff, Placement, Ranking
M.Tech. in Electronics and Communication Engineering (VLSI Design) Highlights
IGDTUW Delhi M.Tech. in Electronics and Communication Engineering (VLSI Design) Fee Breakdown 2024
IGDTUW Delhi M.Tech. in Electronics and Communication Engineering (VLSI Design) Important Events
| Events | Dates |
|---|---|
| GATE 2025 Scorecard by paying a fee of INR 500 per test paper | 1 Jun, 2025 - 31 Dec, 2025 Ongoing |
IGDTUW Delhi M.Tech. in Electronics and Communication Engineering (VLSI Design) Expired Events
| Events | Dates |
|---|---|
| CCMT 2025 | 14 May, 2025 - 5 Aug, 2025 |
| COAP 2025 | 13 May, 2025 - 11 Jul, 2025 |
| GATE 2025 Scorecard | 28 Mar, 2025 - 31 May, 2025 |
| GATE 2025 Final Answer Key | 19 Mar, 2025 |
| GATE 2025 results | 19 Mar, 2025 |
M.Tech. in Electronics and Communication Engineering (VLSI Design) Placement
| Particular | Statistics |
|---|---|
| Average Salary | ₹ 9.0 L |
| Highest Salary | ₹ 9.0 L |
Top Recruiters
E-Book And Sample Paper
Other M.E./M.Tech Courses Offered By IGDTUW Delhi
Exam Accepted
Fees
₹ 1.6 L
Total Fees
₹ 1.6 L
Exam Accepted
Median Salary
₹ 9.7 L
Total Fees
₹ 1.6 L
Exam Accepted
Median Salary
₹ 9.7 L
Total Fees
₹ 1.6 L
Exam Accepted
Exam Accepted
Fees
₹ 1.6 L
Total Fees
₹ 1.6 L
Exam Accepted