College logo

Dhirubhai Ambani Institute of Information and Communication Technology B.Tech. in Electronics and VLSI Design (EVD) Admission: Fees, Cutoff, Placement, Ranking

Private University|Estd. 2001|NAAC Grade A+

B.Tech. in Electronics and VLSI Design (EVD) Highlights

|
4 Years
|
Total Fees: ₹ 12.0 L
ParticularsDetails
Total Fees₹ 12.0 L
Avg Package₹17,10,000
Duration4 Years
Mode Of CourseFull Time
Seat Breakup21
Type Of UniversityPrivate
Website
Course LevelUG

DAIICT Gandhinagar B.Tech. in Electronics and VLSI Design (EVD) Important Events

EventsDates
JEE Main 2026 Session 1 Registration31 Oct, 2025 - 27 Nov, 2025 Ongoing
JEE Main 2026 Session 1 Exam Date21 Jan, 2026 - 30 Jan, 2026

B.Tech. in Electronics and VLSI Design (EVD) Placement

ParticularStatistics
Average Salary₹ 17.1 L
Median Salary₹ 17.5 L
Highest Salary₹ 82.0 L

Top Recruiters

AirtelAmazonFlipkartGoogleLinkedin
OraclePractoSapientTCSZS Associates

E-Book And Sample Paper

Other B.E. / B.Tech Courses Offered By DAIICT Gandhinagar

Seat Offered: 26|Full Time|4 Years
Median Salary
₹ 10.8 L
Total Fees
₹ 12.0 L
Exam Accepted
Seat Offered: 131|Full Time|4 Years
Median Salary
₹ 17.5 L
Total Fees
₹ 12.0 L
Exam Accepted
Median Salary
₹ 17.5 L
Total Fees
₹ 12.0 L
Exam Accepted